Design for integrated circuit layouts is an important part of design for manufacture of patterns. With the development of integrated circuit technology, the complexity of integrated circuit layout patterns has been continuously improved, and pattern density analysis has become an important step in the analysis of many key levels of mask layout data.
In a semiconductor manufacturing process, uniform distribution of pattern densities has a great effect on an etching process and a chemical mechanical grinding process. In the case of uneven distribution of the pattern densities, a load effect in the etching is not only easily aggravated, but also a final size of part of patterns deviates from a target size, thereby making it easier to over-grind the pattern in the chemical mechanical grinding process. Therefore, accurately calculating the local density of the layout and finding a high-risk process region will help various module engineers to know the specific position and pattern characteristics of high-risk process hotspots of products in time, and formulate corresponding countermeasures as soon as possible, so as to smoothly achieve the taping out and mass production of the products.
Traditional pattern density analysis is to set an inspection window by means of moving at a fixed step, and perform calculations in a layout, which will miss the features of some patterns, resulting in the deficiency and deviation in density analysis. The traditional pattern density analysis method and the problems thereof are understood with reference to FIGS. 1, 2A, 2B, 3, 4A and 4B.
FIGS. 1 and 3 show a data layout to be analyzed. The shadow part is the layout pattern, and the local pattern density of the layout refers to a region pattern density of a pre-set size of W*W, in the data layout to be analyzed, determined according to the design rule. Therefore, it is necessary to construct an inspection window of a size of W*W in the data layout to be analyzed, and calculate the ratio of the area of a shadow pattern in the inspection window to the area of the inspection window as a local pattern density.
For the data layout to be analyzed shown in FIG. 1, according to the existing traditional pattern density analysis method, the W*W inspection window is constructed by traversing the data layout at a fixed step. The steps of implementing the traditional method are illustrated by way of examples below: Referring to FIGS. 2A and 2B, for example, by taking a left lower vertex of the layout as a starting point, construct a W*W inspection window (such as a thick line frame in FIG. 2A) to the right and upward, and calculate the pattern density in the inspection window. Then, by moving to the right at a step of ½W, construct a W*W inspection window and calculate a pattern density in the inspection window, such as a thick line frame in FIG. 2B, and the dotted line indicates the step of ½W. By analogy, sequentially move the inspection windows at a fixed step till to edges at two sides of the layout and calculate the pattern density within the inspection window each time, so as to obtain a local pattern density of the layout. Although there is a region with a local pattern density being 0% in a middle part of the data layout as shown in FIG. 1, it can be known from the dotted lines shown in FIGS. 2A and 2B that according to the traditional pattern density analysis method, the inspection window with the 0% region cannot be constructed. Therefore, the existing traditional pattern density analysis method has errors and omissions in analyzing the minimum value of the pattern density.
For the data layout to be analyzed shown in FIG. 3, according to the existing traditional pattern density analysis method, the W*W inspection window is constructed by traversing the data layout at a fixed step. The steps of implementing the traditional method are illustrated by way of examples below: Referring to FIGS. 4A and 4B, for example, by taking a left upper vertex of the layout as a starting point, construct a W*W inspection window (such as a thick line frame in FIG. 4A) to the right and downward, and calculate the pattern density in the inspection window. Then, by moving to the right at a step of ½W, construct a W*W inspection window and calculate a pattern density in the inspection window, such as a thick line frame in FIG. 4B, and the dotted line indicates the step of ½W. By analogy, sequentially move the inspection windows at a fixed step till to edges at two sides of the layout and calculate the pattern density within the inspection window each time, so as to obtain a local pattern density of the layout. Although there is a region with a local pattern density being 100% in a middle shadow part of the data layout as shown in FIG. 3, it can be known from the dotted lines shown in FIGS. 4A and 4B that according to the traditional pattern density analysis method, the inspection window with the 100% region cannot be constructed. Therefore, the existing traditional pattern density analysis method has errors and omissions in analyzing the maximum value of the pattern density.
It can be seen therefrom that the traditional pattern density analysis method in the prior art has the defects of missing the features of part of patterns, resulting in the deficiency and deviation in density analysis. Therefore, there is an urgent need for a new pattern density analysis method, which can effectively overcome the above-mentioned problems, accurately calculate a local pattern density of a layout, and obtain the extreme value density, thereby facilitating the monitoring of layout design.